Wednesday, October 9, 2019

Preliminary Numbers on YMTC Xstacking 64L 256Gbit Chip

One of our top area of analysis is chip cost for all memory chips and even SOCs/logic chips. We are adding 64L YMTC chip to our report that has costs for all NAND memory from each company from 64L to 1xx layers.

High level Summary:

The chips size takes advantage of xstacking with periphery and array on top of each other. To a first order the chip is similar size to Microns 64L part. The reason YMTC chose chip bonding is to control logic processing and performance separate from array processing on separate wafers and then bonding them together. Having array built on top of the periphery does impact the periphery but Micron and others have been successful doing just that. YMTC claims to get much better NAND performance from the Xstacking process.

The down side is that you have two wafers, the cost to bond them together and the complexity of running a two process system. We will also see how Xstacking works in 8 die and 16 die packages needed for SSDs.

The cost, when mature, is modeled to be 34% higher than Microns 64L CMOS under array part. Since YMTC is not shipping volume yet and the Fab is projected to be less than 10K wafer per month currently, the actual cost is pretty far from maturity. We have the cost today, and how it will track over time as it ramps. We also have 128L projected costs for YMTC (and all other companies). We include die size, wafer costs, wafer yields, die yields, bonding cost and how these change over time.
We also have the business model on how this is still a win for Chinese industry, assuming they can ramp production. And how this impact NAND pricing and markets in the future.

The volume will be very small to start but, assuming the reported information is correct, we should see Xstacking chips in products in the next several months.

Mark Webb

Thursday, September 26, 2019

Top 3 Takeaways from Micron Earnings (and 2 bonus)

Top 3 Takeaways/Questions from Micron Earnings ... and two bonus takeaways from a Intel Presentation

  • Pricing dropped in Micron FQ4/CQ3: DRAM Prices down 20% after Trendforce and various sell side analysts said price was flat. Now there is some offset in timing but flat and down 20% are in way different directions. There is a reason and data to back what happened to Micron in FQ4 on DRAM pricing. They later stated that pricing was starting to climb on NAND although it dropped 8% in FQ4
  • Micron plans very little to no cost reduction in 2020. Repeatedly stated no NAND cost reduction due to conversion to replacement gate. DRAM cost reduction will be less than 10%. DRAM is somewhat expected and not an issue if pricing holds. But no cost reduction on NAND when it is losing money today has some serious implications for Micron in 2020.
  • FQ1 earnings will be less the FQ4. This was a surprise to just about everyone who thought we would get a 2H recovery. Why the drop in a historically good quarter? and this is including 3-5c/share earnings impact of NAND accounting change (BTW there is a good reason Micron is changing NAND depreciation)

2 Bonus items: Intel announced NAND and Optane Roadmap

  • Intel announced they will have new Optane DIMM Modules "Barlow Pass" in 2020 for servers. This seems pretty soon for a follow on given the delays and slow adoption of Apache pass DIMMS. However it is important to keep new generations coming and Intel sometimes delays new products so maybe it wont step on Apache Pass toes too soon. We have cost models for 1st and second gen Optane memory media. Rumor is that Barlow Pass uses Apache pass memory chip (unverified)
  • Intel announced 144 layer NAND technology with floating gate. Intel and Micron are both going to struggle with their first generation apart..... mainly from a financial point of view. but the fact that Intel is announcing the 1xx layer part for 2020 is good for Intel customers and a welcome surprise for me. I was getting worried Intel would skip the first gen 1xx NAND technology. NAND costs will keep coming down in 2020/2021 ... we have summaries of where each company stands in cost with 96L and 1xx layer.

Lots of new technologies, financial challenges, and we have the macroeconomic challenges too. 2020 will not be a dull year.

Mark Webb

Monday, August 19, 2019

Memory Pricing Update and Models August 2019

One of the most common questions these days is “what will happen on pricing”. No one knows for sure and wild reaction to news articles is adding to the speculation

Some thoughts on pricing models

  • DRAM exchange/ Inspectrum is usually directionally correct, but wrong in magnitude and in absolute numbers when comparing to actual company ASP
    • Spot pricing is open market and not related to what major customers pay
    • Customers react differently in magnitude to increases and decreases in exchange price
    • Even contract price is not REAL contract price and does not match company ASPs
  • Over time prices drop … A lot … in a balanced market, we model 25% per year for NAND and 15% per year for DRAM going forward. This is FAR lower than historical memory pricing (35%+) and matches cost expectations.
  • Actual Pricing is a response to market growth, Inventory, and customer relationships. We can discuss how to track these
  • the number one input to memory company profits is pricing.... so anything they can do (legally hopefully) to get pricing to increase will help memory companies. Unfortunately or fortunately, they are just not very good a collusion! but there are legal tactics that they do all the time.
  • Cost for each company matters. One model is that pricing always drops til at least one company loses money. Today, not all memory companies have the same cost. in 2021, there will be even larger differences in cost with different leaders
Where are we today?:

  • We had a shortage of NAND and DRAM through about Q4 2017 and Q3 2018 respectively. Since then both are in major oversupply. Inventory at customers and suppliers skyrocketed. We can explain why this happened and when it will happen again.
  •  Well publicized supply limitations (power outage, Japanese chemicals, Reduced wafer starts) have people optimistic on pricing. All of these require discussion to see if they matter and how much. Remember: lowering wafers starts is a horrible business idea.... unless you tell everyone you are doing it!
  •  Dramexchange has reported spot NAND price increases, contract price decreases, wafer price increases.  This actually all makes sense. We have input from suppliers and customers and where they see the market and strategies. It is a cyclical market, prices will go up WHEN there is a shortage. We have a model on when this will happen across the board as reported by real companies. We also tell you how to monitor it

So lots of people will report where pricing is today (Dramexchange and Inspectrum are good starts). The key is how to monitor this in the next 3 months, 6 Months, 1 year and 2 years and why each company may not see the same effects. Contact us for more information

Mark Webb
MKW Ventures Consulting

Thursday, August 8, 2019

3D Xpoint Revenue and Bit Output

We presented bit output and revenue projections for 3D Xpoint at Flash Memory Summit this week. See details below

To calculate this, we modeled Fab wafer capacity, factory loading percentage, yields, die size, cost, pricing, etc and how those are projected to change over the next few years.

Charts are below, full presentation is on our website and Flash Memory Summit site. The full details on all of the parameters going into the model are available to clients

GB Output Projections:

3D Xpoint Revenue Projections:

See presentations for more info. Call to set up meeting to discuss monthly updates to 3D XPoint output, revenue, and status on 2nd Generation 3D Xpoint.

Mark Webb

See ALL Reports at

Wednesday, August 7, 2019

What's the Best Approach to Persistent Memory at FMS

I will be hosting a panel session on "What is the Best Approach to Persistent Memory" at Flash Memory Summit, Thursday at 2:10PM in Room GAMR 2. On the Panel we will have

  • Rahul Advani, Netlist, VP Marketing
  • Bill Leszinske, Retired Corporate VP from Intel NVM Solutions Group
  • Arthur Sainio, Smart Modular, Director Product Marketing
  • Pankaj Bishnoi, Everspin, Director of Business Development

We will discuss what the future of Persistent Memory is and what forms it will take. What is the memory, what is the speed, what is the density, how will we access it?

Stop by and bring you tough questions for the panel!

Mark Webb
MKW Ventures Consulting

Thursday, August 1, 2019

Mark Webb, MKW Ventures at FMS 2019

 I will have a number of presentations at Flash Memory Summit this year. I also look forward to meeting with industry leaders and people who want to develop a better understanding of Memory, Storage, Markets, and which technologies will dominate the next 10 years. I will have updated NAND technology roadmaps and the costs for each company for 2018-2022 and update on where China is positioned in  NAND and DRAM technology.

MRAM Developer Day and Preconference Aug 5th

  • Persistent Memory Preconference seminar: I will present an overview of persistent memory, applications, changes over the past year and my forecast for revenue over the next 5+ years. Persistent Memory is here and is real today Monday 8:30-Noon. Rm 206
  •  MRAM Developer Day: We have a panel of experts presenting what the future of MRAM will be and how we will get there. I like to say that MRAM is a tale of two markets. Embedded and discrete with two sets of success criteria and two sets of challenges Monday 5-6PM Great America Room

Flash Memory Summit Aug 6-8, 2019

  •  PMEM-102-1: Persistent Memory Part 2: Software and Applications Tuesday at 3:40. Market overview of Persistent Memory, Markets, revenue and what is needed to achieve the large CAGR that we are predicting. What has changed in the last year and what has not advanced like we hoped
  • NEWM-102B-1: Annual Update on Emerging Memory Technologies Tuesday at 4.55. Here I will present a 1 hour presentation on the status of multiple new memories. What the advantages and disadvantages are for each. We have lots of new memories that have made progress, we will show where they stand on the Product Lifecycle for NVM. Some are shipping today with billions in revenue predicted. Some are 5-10 years from being in an actual product that you can buy. Bring your question on every memory technology
  • “Chat with Experts Table”  (Tuesday 7PM). I will be hosting the table on 3D XPoint technology. Come ask questions and discuss the breakthrough memory, what is costs, how it is used, how and where it is made and when the competitors will join the fun.
  • NEWM-201-1: 3D XPoint: Current Implementations and Future Trends Wednesday at 8:30AM. I will show new applications in the last year, Costs compared to other technologies, Updated revenue forecast, Bit shipments in 2019 and 2020 including Gen 2 Xpoint, Speed, Endurance. Plus address how development will move forward after the Intel/Micron breakup
  •  PMEM-302A-1: What’s the Best Approach to Persistent Memory Today…and Tomorrow? Thursday at 2:10. I am hosting this panel session with experts on persistent memory to present what the future looks like and how will it change computing.
Call or text to set up a meeting and review the information 1:1

Mark Webb

Thursday, July 25, 2019

See details on 3D XPoint Optane Technology at FMS August 7th

Intel 3D Xpoint Optane Update at FMS Aug 7th

I will be presenting at Flash Memory Summit on Intel Optane/3D XPoint. Some highlights below

  • Intel Revenue updates for Optane today and in the future
  • Technology Cost Update for 1st and 2nd Gen of technology
  • Performance Update of SSDs and DIMMs
  • NEW! DIMM adoption and feedback
  • NEW! 3D Xpoint Fab Capacity, bit shipments, and wafer output today and in the future.
  • NEW! Micron and Intel Competitive position vs other PCM crosspoint arrays and NVM technologies

Session NEWM 201-1 Wednesday Aug 7th at 8:30AM
Contact me for appointment to discuss additional details in 1:1 meetings.

Mark Webb

Wednesday, June 19, 2019

Top 3 Memory Market Predictions (PLUS Bonus)

Top 5 Memory Market Predictions

We are near the end of CQ2 and data is leaking out on the future. Some predictions from MKW Ventures Consulting. Reminder: Information comes from the discussion on these points as there are pages of data and models behind each one.

1) 2H recovery might happen, but the data doesn't seem to show that. It looks like the 2H "recovery" will be described as "it didn't happen due to other issues" and "we are recovering. Earnings stopped dropping". I like to call these "alternative facts". We can discuss when the real recovery will happen and how to monitor it.

2) Inventory at end customers is dropping and will reach normal amounts in 2H. However, supplier inventory and channel inventory still exists. This causes end customers to push inventory levels below target amounts and to drive prices down

3)  NAND/DRAM bit demand will start to grow again in 2H but overall bit growth will be at or below historical levels (CAGR 35% NAND, 15-20% DRAM). This will not get the market to "recovery". Revenue and earnings are still in "trough"

Bonus Prediction: There will be a recover and we can predict the timing. Inventory will go to normal at supplier and below normal at end customer. Then comes and small demand trigger and the shortage... we can discuss when this will happen.

Bonus Prediction 2: China and Trade... companies are changing their supply chain to deal with China tariffs. This will lead to shipment from and through other countries instead of China. However, uncertainty on how these tariffs play out is slowing growth and investment. China attempts to make memory in China with Chinese owned companies will continue to be VERY minor despite hype until at least 2022 ... but non-Chinese companies will continue to have lots of Fab output from China that has no trade restrictions with the US.

Just an opinion! We will have lots more data at Flash Memory Summit

Mark Webb

Wednesday, March 13, 2019

Memory Cycling Capability: Sorry, It's Complex.

I addressed this in a couple presentations at Flash Memory Summit but questions on cycling performance have grown based on 3D Xpoint and QLC. I will highlight why “how many times can you cycle it?” is 10x more complicated that most people realize.

Key items on cycling performance (Random thoughts.... there is a lot more detail)
  • Cycling specifications are based on the criteria used to define success. Rarely do bits fail “dead”. They usually are slow to program or erase, read disturb easily, can’t hold charge for a long time, etc. A device spec could be 800us program time and 100us read time and data retention of 5 years. If I change that to 1200us program, 200uS, and 1 year retention, I could hypothetically increase the cycling capability from 3000 cycles to 10,000 cycles. And what if I changed data retention to 1 hour ???
  • Cycling specs are based on allowed fail rate and die level/system level error correction to deal with it. This is published in detailed bit error rate data (BER).  Basic NAND  allows us to tolerate thousands of  blocks failing to cycle, and millions of bits that sometimes read erratically. I can always increase redundant blocks and add more ECC capability. These “tricks” prevent the end customer from seeing errors. A QLC cell seems less reliable than TLC or MLC but it is possible to make it MORE reliable to the end user with error correction. 
    • In addition to all of the error correction, we can adjust for end user fail rates as well. Is 2% AFR (annual fail rate) OK? 0.7%? 0.2%?  Are you willing to pay 2x the price for the 0.2% fail rate?
  • Based on the above statistics and BER, the size of the array matters. This is very important when we talk about emerging memory. Without error correction, my test chip (a few bits) for MRAM or ReRAM or 3DXP may cycle 10M times. When I put 64K bits in an array it might last 1M times. A 1Gbit array will last 100K times… and then we get into error correction and fail rates.
  • Theory vs Actual. I have seen multiple papers saying that MRAM has infinite endurance or something like 1E12 cycles. But MRAM is a real product now and with that comes real cycling numbers. I don't believe any MRAM product is spec’d with 1E12 cycles. Think 6 order of magnitude less….. best case. There are ways to manage the cycling up and down. The capability starts at 1E12 and then starts to drop when you actually make real devices. This is the problem with universal memory claims because … wait for it … DRAM and SRAM can ACTUALLY last 1E12 cycles in real products. No emerging memory is even close.
  • So, If we just take NAND and things we have seen over the years as examples of the above.
    • NAND theoretically can cycle 1E12… charge trapping is a non-ideality that I will ignore
    • A small array (1K) can cycle >1M times without any fails.
    • I can buy a 1Gbit chip today that can cycle >100K times (50nm SLC with ECC).
    • Planar TLC can cycle 3K times…. If I allow 1% failure, it last 10K cycles, the average (median) bit in that array lasts >30K cycles.
    • If I slow down the program and read timing dramatically, I can make a TLC 3K part last 10K+
    • And hypothetically, If I build a QLC SSD with massive redundancy and overprovisioning (think RAID), I can have 10 drive writes per day for 10 years. Looks like 36,500 cycles to end user.. but it is not

What does all this mean? The memory companies (and some SSD companies) know all of this and have details on tradeoff and how to manage them... Sorry, it's complex. Ask the experts how it works in a given application. Asking “how many cycles does that last?” or saying “QLC isn’t good enough” may not be useful

We can discuss specific questions to ask (BER, FIT, AFR, DPM, etc) and compare NAND, DRAM, MRAM, ReRAM, 3DXP in more detail. We published estimated 3DXP cycling performance numbers. Call for more information

next blog, I will answer the question "is Schrodinger's cat dead or alive??". As I tell my kids when we discuss at the dinner table .... "It's complex" 

Mark Webb

Friday, March 8, 2019

5 Things to Know About the Current Memory Market

5 Things to Know About the Current DRAM and NAND Market

Everyone is concerned about the memory market and trying to predict the future. Five Items to consider

1) Memory market is still growing long term. But the numbers matter. DRAM bits are growing at 18-20% CAGR. NAND bits are growing 35% CAGR. That is about the lowest CAGR in history, is indicative of a maturing market and includes effects of of all the buzzwords (SSD, NVMe, AI, ADAS, 5G, Edge Computing). What does this mean? On DRAM, we can’t always grow our way out of supply issues (without crashing the price) and if prices drop at all, it takes a long time for revenue to recover. On NAND, we can grow our way out but it requires massive price drops.

2) As mentioned in a previous note, elasticity helps growth but it is not as large as expected, not as quick as hoped, and whenever we are talking about significant elasticity, profits are at risk.

3) A famous man said recently “There is No Collusion!!”. IF the DRAM suppliers work together to never lower price and hold inventory until Apple, Dell, Google cave on pricing, then DRAM profits will continue at unreal levels. But even getting 3 people to collude appears to be tough… this is evident in DRAM pricing. The "MKW" report says “currently little evidence of collusion”. 

4) NAND is in a time where profitability is not a given. At this time, one of the keys is “who has lowest cost (full and cash), who can best survive a zero profit market?” Historically we would often say Samsung is the low cost producer. But differences in technology and the movement from 32L-128L has changed the leaders along the way. Also, target markets from phones, to Client SSDs, to Enterprise SSDs will change this.

5) When does this bottom out? Micron will probably give us the next checkpoint on Mar 20th. But we need to un-hide the demand by fixing inventory. If Amazon knows Hynix is holding 12 weeks of inventory, they will reduce theirs to “working inventory” and demand lower prices. Starting less wafers is not a smart idea so companies build more inventory. Once corrected, long term demand, short term demand from the field, plans for supply growth and revised cost numbers all kick in to tell us whether it is a 1 quarter dip or a 6 quarter dip. We have the numbers from all of these areas and an estimate on when it will recover that is updated weekly.

Mark Webb

Friday, February 22, 2019

How Elastic is NAND demand?

When Memory prices drop dramatically, we are always told that demand is elastic so demand will pick up to make up for the drop. I am not sure this always happens.

When I worked in memory manufacturing, I would say "whenever people are talking about elastic demand, we are about to lose money. The memory market is more profitable today but I wonder how elastic demand is and in which markets. 

Some thoughts:
  • Smartphones are a leading customer of NAND memory. I just checked Apples website and they are currently charging $200 for adding 256GB of memory. The cost for this memory to Apple is about $32 and dropping. So it is pretty clear that a change in the price of NAND is not whats driving 256GB vs 512GB sales. Side note: This also the reason I refuse to let my kids get memory increases on their Iphones .... I can't get myself to pay Apple 80c/GB for NAND!
  • In 2017 NAND prices were flat to up a little. While client SSD sales slowed, overall NAND bit growth was still 35% despite an increase in NAND prices when we expected a decrease of 20%+
  • In Q4 2018, Client SSD unit sales were recently shown to be up 35% YoY. The client SSD pricing has dropped over 40%, which more than double the consensus ASP reduction predicted at beginning of 2018. The prediction for SSD unit growth was 30-35%. So did the crash in SSD pricing dramatically help client sales? Revenue dropped 5% YoY
We are always challenged with the unknown what if of "if prices didn't,crash, then units would have dropped" 

A possible model: There is elasticity but it has two characteristics.

1) Elasticity is delayed by 1+ year. AWS is not going to redesign there datacenters in a month based on low SSD costs. They need time to redesign and show the financial benefit and to ensure it is a sustainable change. Also people based future designs and architectures on the expectation that ASP will drop. AWS is planning for NAND ASP of about $25/TB in 2025 and they are making plans based on that.

2) When it happens, Elasticity is smaller than people think. Obviously a instantaneous 50% drop in ASP could easily lead to people buying 2x the chip size or 2x the capacity in an SSD. But do more units get sold? Prices drop on average and bits grow on average. A simple proposed metric: An incremental 15% ASP reduction will lead to an incremental 5% increase in bit growth. So if ASP was predicted to drop 25% and bits grow 30%, If ASP drops 40% we will see 35% bit growth.

I have data to back these ideas up and anecdotal stories from purchasing discussions with PC, Hyperscale and  Handset OEMS. We can also talk about how this affects memory revenue and margins in 2019. Call for more info and discussion

Mark Webb

Monday, January 28, 2019

Five Thoughts from SNIA 2019 Persistent Memory Summit

Last week I attended the Persistent Memory Summit in Santa Clara. This is a great one day conference each year bringing together experts on Persistent Memory examples, system support, and applications. The presentations are posted and there is a video as well (thank you SNIA!)

5 thoughts:
  1. Now that persistent memory has moved from a “wouldn’t it be great if we had this?” concept to a “we have some options, now what?” debate…. We need to define “persistent memory” based on the new reality. Rob Peglar and Stephen Bates reminded us that using the term SCM is not politically correct and can only be used in a safe space away miles from a SNIA conference (Starbucks Milpitas worked for me). This is good since it was way too vague and theoretical. Andy Rudoff offered a simple definition: it needs to be address in load/store like memory (Not blocks and pages), and persistent. Speed is in the eye of the beholder but a year ago there was a definition of <2us latency in applications which I liked. The NVDIMM-N and NVDIMM-P definitions would indicate that it does not need to be one type of memory but is a DIMM or system. These simple definitions would seem to eliminate some products that are often referred to as “persistent memory” (side discussion)
  2. The most common persistent memory today arguably is NVDIMM-N which provides us with up to 32GB DIMMS that can be written to like DRAM but never lose data. The challenges here are that the use of DRAM for entire capacity plus NAND plus energy support leads to a high cost that is 3x or more per bit compared to DRAM. As a result, a small amount of systems (typically SANs) use them today. Multiple providers were at the conference and you can buy this persistent memory whenever you wish.
  3. Frank Hady presented Intel Optane Persistent Memory and the applications. Two modes, one is persistent memory (App Direct) and one is memory Mode (which loses data on power cycle). Memory mode is great for adding tons of memory that is somewhat slower and cheaper but it is not persistent per Intel documentation. This is poised to grow rapidly with Intel backing but it is off to a slow start. From talking to customers, most say they still can’t get Optane PM to build their own system and the availability today is running apps on cloud systems. I have details on modes and projected revenue in other publications
  4. NVDIMM-P is proposed as an open source version similar to Optane PM where the architecture supports some DRAM plus NAND or other memory type to optimize for cost. This will allow DIMMs that are LESS expensive than DRAM, higher density, and more non-proprietary options. We need this ASAP! When can I get one???
  5. From the conference, it feels like Infrastructure support and application drivers are ahead of the actual hardware…. This is probably not totally true but there is drive from Intel and SNIA to get all the support in place and the OS supports it and we have applications. Once Intel ships significant volume and competitors start shipping their versions of PM, we can test out all the applications

See more info on our blogs or website. Thanks to Chris Mellor of Register fame for republishing some of my FMS work on persistent memory and Optane with all the gory details and numbers.

Mark Webb

Tuesday, January 22, 2019

Jan 2019 Intel Optane Revenue Update

At 2018 Flash Memory Summit we presented models for 3D XPoint/Optane revenue, costs, performance and endurance. We update these here.

In the 6 months since, Intel has updated product roadmaps and has provided details on the Optane DIMMS. New projections are based on these changes

Revenue From FMS2018 and this Blog

Most likely 2018 sales did not quite meet expectations. DIMMs sales were fairly low pre-production (read: Samples). Non DIMM SSDs sell but at lower prices and in lower volumes than expected.

2020 Still can meet our projections from FMS.... but Intel is off to a slow start in 2019

  • Cascade lake and volumes are later and lower than planned. 
  • Attach rate projection for Optane DIMM to cascade lake was low and we lowered it even more based on customer reports and timing. Also Intel showed and we reviewed in this blog that when used as main memory expansion, Optane DIMM is not persistent. To be persistent it is a separate memory block... More like a SSD on the DRAM bus.
  • Server DRAM Demand is down, prices are down. This is not good for 2019
  • The Lehi Factory is in transition to Micron ownership. Intel has plans on how to ramp XPoint internally but those are in progress most of 2019.
  • Optane Memory for desktops has not taken off. Intel now plans notebook version with Optane Memory + QLC SSD which we have shown to be a cost effective performance SSD.
Unless Intel gives us data at Persistent Memory Summit or in Earnings announcement, we have to model the revenue (Intel can always correct me!). We project 2019 to be below the 2018/2020 midpoint by about $100M in DIMMs and overall Optane revenue in 2019 to be about $200M below 2018/2020 Midpoint. Micron will have no measurable revenue in 2019. As you can see, the revenue is based on DIMM sales, if those continue to slip, the numbers will get lower and competition is enabled

We have detailed data on GB shipments, DIMM vs SSD sales, Pricing, Cost, performance and endurance for 3D XPoint and Optane. We also can discuss the JV agreement changes and implications. Call to discuss. We will be at 2019 Persistent Memory Summit this week to discuss details as well

Mark Webb

Wednesday, January 16, 2019

2019 Persistent Memory Summit and Reports

SNIA is hosting the 2019 Persistent Memory Summit next week. We will have detailed updates and reports on hot topics in Persistent Memory shown below

I highly recommend the people attend this as it provides are great vision for technology and markets. 

While I am not presenting, I will attend and have updated data from my FMS presentations on 
  • 2019 Persistent Memory Revenue numbers
  • Optane revenue for Intel overall and specifically the "quasi-launched" Optane DIMMs
    • Hint: both applications and the market are changing
    • Sometimes persistent memory is not persistent
  • 3d Xpoint technology roadmap, specifications, endurance, and challenges for both Micron and Intel
  • Competition to Optane from ReRAM, NVDIMM-P, Low latency NAND, ZNAND etc. Can they match or even surpass Optane?
Plus I will provide commentary on technology, market, and application presentations real time. 

Hope to see you there, text me or email to set up a meeting. 


Mark Webb