Memory Market Results for Oct 31 (Trick or Treat) and What’s Normal

Memory Market Results for Oct 31 (Trick or Treat) and What’s Normal

We have the results in from a variety of manufacturers and can state what is going on in the market. We have all the details on individual companies and why they are behaving like they are

Summary:

DRAM: All companies reported higher bit sales and much lower ASPs. Average ASP dropped mid teens  (remember when people thought prices would go up in Q3?). inventory is still pretty high

Reason: manufacturers are trying to get rid of bits, customers are taking advantage of low prices to build inventory. Datacenter/enterprise is back to growth and mobile looked pretty good. Prices dropped much more than costs so margins continue to shrink.

So DRAM is heading to 20% annual bit growth like predicted by everyone. But price drops will mean margins are continuing to drop. But at least DRAM is still making money despite lower margins.

NAND: Micron and Samsung reported higher bit sales on continued price drops. NAND is not a profitable business so prices must rise or flatten to actually make money. WDC reported flat pricing (they were claiming 10% higher prices in July) and Hynix reported mid single digit price increase on modest bits sales. And Inventory is still pretty high

Reason: Companies are behaving differently with respect to how they manage this and how aggressive to be given continued high inventory. You need to lower prices to move inventory. But you need to raise prices to be profitable. You need to move to 96L/12x layer to lower costs. But this increases capex and increase supply. This paradox will all sort out by 2H 2020… but it will be a competition until them.

NAND is a battle between working off inventory and trying to get profitable. Hynix and Samsung are behaving very differently on this. As are Micron and WDC. NAND will hit 40% bit growth as predicted by everyone but the margins are poor.

So what does balanced and normal look like? (Normal will happen in mid to late 2020)

DRAM price drops by 5% per quarter. Bits shipped increase by 5% per quarter. Costs drop by 5% per quarter. Inventory is flat (target is 4-6 weeks at supplier)

NAND price drops by 7% per quarter. Bits shipped increase by 8-10% per quarter. Costs drop by 7% per quarter. Inventory is flat (target is 6-8 weeks at supplier)

PREDICTION: We have data on who will win in this and who has challenges… And what recent Earnings reports mean…. And when inventory will be worked off…. And when Chinese companies will make a difference.  AND We have costs for everyone, so that will help determine winner.

Mark Webb
www.mkwventures.com

Preliminary Numbers on YMTC Xstacking 64L 256Gbit Chip

One of our top area of analysis is chip cost for all memory chips and even SOCs/logic chips. We are adding 64L YMTC chip to our report that has costs for all NAND memory from each company from 64L to 1xx layers.

High level Summary:

The chips size takes advantage of xstacking with periphery and array on top of each other. To a first order the chip is similar size to Microns 64L part. The reason YMTC chose chip bonding is to control logic processing and performance separate from array processing on separate wafers and then bonding them together. Having array built on top of the periphery does impact the periphery but Micron and others have been successful doing just that. YMTC claims to get much better NAND performance from the Xstacking process.

The down side is that you have two wafers, the cost to bond them together and the complexity of running a two process system. We will also see how Xstacking works in 8 die and 16 die packages needed for SSDs.

The cost, when mature, is modeled to be 34% higher than Microns 64L CMOS under array part. Since YMTC is not shipping volume yet and the Fab is projected to be less than 10K wafer per month currently, the actual cost is pretty far from maturity. We have the cost today, and how it will track over time as it ramps. We also have 128L projected costs for YMTC (and all other companies). We include die size, wafer costs, wafer yields, die yields, bonding cost and how these change over time.

We also have the business model on how this is still a win for Chinese industry, assuming they can ramp production. And how this impact NAND pricing and markets in the future.

The volume will be very small to start but, assuming the reported information is correct, we should see Xstacking chips in products in the next several months.

Mark Webb

www.mkwventures.com